2024/5/28 10:39:40
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1 Features
• Available in the Ultra Small 0.64-mm2 Package (DPW) with 0.5-mm Pitch
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Provides Down Translation to VCC
• Max tpd of 3.5 ns at 3.3 V
• Low Power Consumption, 1-μA Max ICC
• ±24-mA Output Drive at 3.3 V
• Ioff Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
2 Applications
• AV Receiver
• Audio Dock: Portable
• Blu-ray Player and Home Theater
• DVD Recorder and Player
• Embedded PC
• MP3 Player/Recorder (Portable Audio)
• Personal Digital Assistant (PDA)
• Power: Telecom/Server AC/DC Supply: Single Controller: Analog and Digital
• Solid State Drive (SSD): Client and Enterprise
• TV: LCD/Digital and High-Definition (HDTV)
• Tablet: Enterprise
• Video Analytics: Server
• Wireless Headset, Keyboard, and Mouse
3 Description
This single buffer gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G34 device performs the Boolean function Y = A in positive logic.
The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC Operating range.
The SN74LVC1G34 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
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