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SN74AHC126DBR_TI(德州仪器)中文资料_英文资料_价格_PDF手册

2024/7/4 16:38:11

15

SN74AHC126DBR

具有三态输出的 4 通道、2V 至 5.5V 缓冲器

 

 

 


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· Operating Range 2-V to 5.5-V VCC

· Latch-Up Performance Exceeds 250 mA Per JESD 17

 

 

                                           


 

description/ordering information

 

The ’AHC126 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.

 

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.