芯云购商城
搜索关键词不能为空
搜索关键词不能为空
收缩

QQ在线咨询

电话咨询

  • 0755-82579613

Skype 咨询

  • 3003361628@qq.com

SN74LV27ADR_TI(德州仪器)中文资料_英文资料_价格_PDF手册

2024/4/9 17:31:30

306


SN74LV27ADR

3 通道、3 输入、2V 至 5.5V 或非门

 

 

                                     更多技术详情请登录www.mroic.cn            



 

· 2-V to 5.5-V VCC Operation 

· Max tpd of 7 ns at 5 V 

· Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C 

· Ioff Supports Partial-Power-Down Mode Operation 

· Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II 

· ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

 

 

                                                       


 

 

description/ordering information

 

These triple 3-input positive-NOR gates are designed for 2-V to 5.5-V VCC operation.

 

The ’LV27A devices perform the Boolean function Y = A B C or Y = A • B • C in positive logic.

 

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.