2023/8/30 11:53:06
211
JM38510/65352BDA 具有清零和预置端的双路负边沿触发式 D 型触发器
Features
? Operating voltage range of 4.5 V to 5.5 V
? Outputs can drive up to 10 LSTTL loads
? Low power consumption, 40-μA max ICC
? Typical tpd = 17 ns
? ±4-mA output drive at 5 V
? Low input current of 1 μA max
? Inputs are TTL-voltage compatible
Description
The ’HCT74 devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs.
热门型号
热门资讯
20万现货SKU
品类不断扩充
科技智能大仓储
4小时快速交货
仅从原厂和代理商进货
每一颗料均可原厂追溯
明码标价节省时间成本
一站式采购正品元器件
工商网监